For proper operation of circuits using SCRs, the trigger circuits should supply the firing signal at precisely the correct time to assure turn-on when required. In general, the firing circuit used to trigger an SCR must meet the following criteria:
- Produce a gate signal of suitable magnitude and sufficiently short rise time
- Produce a gate signal of adequate duration
- Provide accurate firing control over the required range
- Provide accurate firing control over the required range
- Ensure that triggering does not occur from false signals or noise
- In AC applications, ensure that the gate signal is applied when the SCR is forward-biased
- In three phase circuits, provide gate pulses that are 120O apart with respect to the reference point
- Ensure simultaneous triggering of SCRs connected in series or in parallel
Three basic types of gate-firing signals are normally used: DC signals pulse signals, and AC signals.
Triggering requirements are normally provided in terms of DC voltage and current. Since pulse signals are ordinarily used for firing SCR’s it is also necessary to consider the duration of the firing pulse. A trigger pulse that has a magnitude just equal to the DC requirements must have a pulse width that is long enough to ensure that the gate signal is provided during the full turn-on time of the SCR. As the magnitude of the gate signal increases, the turn-on time of the SCR decreases, and the width of the gate pulse may be reduced. For highly inductive loads, the pulse width must be made long enough to ensure that the anode current rises to a value greater than the latching current of the SCR.
Figure 1(a) shows a simple circuit that applies a DC signal from an external trigger circuit. The switch S is closed to turn the SCR ON. Closing the switch applies a DC current to the gate of the SCR, which is forward biased by the source (VS). Once the SCR is conducting, the switch can be opened to remove the gate signal. Diode D limits the magnitude of a negative gate signal to = 1 V, and the resistor RG is used to limit the gate current. Figure 1(b) shows an alternative circuit that provides the gate signal internally from the main power source. The two circuits operate in essentially the same way.
Applying a constant DC gate signal is not desirable because of the gate power dissipation, which would be present at all times. Also, DC gate signals are not used for triggering SCR’s in AC applications, because the presence of a positive signal at the gate during the negative half-cycle would increase the reverse anode current and possibly destroy the device.
Figure 1: DC signals (a) from a separate source (b) from the same source
To reduce gate power dissipation, SCR firing circuits generate a single pulse or a train of pulses instead of a continuous DC gate signal. This allows precise control of the point at which the SCR is fired. In addition, it is easy to provide electrical isolation between the SCR and the gate trigger circuit. Electrical isolation by means of a pulse transformer or optical coupler is important if several SCR’s are gated from the same source. Isolation also reduces unwanted signals, such as transient noise signals, that could inadvertently trigger a sensitive SCR.
Figure 2(a) shows the most common method of producing pulses using a unijunction transistor (UJT) oscillator. This circuit is ideal for triggering an SCR. it provides a train of narrow pulses at B1. When the capacitor is charged to the peak voltage (VP) of the UJT the UJT turns on. This places a low resistance across the emitter-base 1 junction, and emitter current flows through the primary of the pulse transformer, applying a gate signal to the SCR. The pulse width of the output signal can be increased by increasing the value of C. One difficulty with this circuit is that due to the narrow pulse width a latching current may not be attained before the gate signal is removed. An RC snubber Circuit can be used to remove this problem.
Figure 2: SCR trigger circuit using a UJT oscillator
The Operation of the circuit shown in Figure 2(b) is similar. The width and rise time of the pulse can be improved by using the output across R, to drive a transistor Q connected in series with the transformer primary. When the pulse from the UJT is applied to the base of Q, the transistor saturates, and the supply voltage VS is applied across the primary. This induces a voltage pulse at the secondary of the pulse transformer, which is applied to the SCR. When the pulse to, l the base of Q is removed, it turns off. The current caused by the collapsing magnetic field in the transformer induces a voltage of Opposite polarity across the primary winding. Diode D provides a path for current flow during this time.
Figure 3:(a)An SCR trigger circuit using a diac (b)waveform
A similar circuit using a DIAC (Figure 3(a)) charges a capacitor slowly over a period of time determined by the RC time constant. After the capacitor has been charged to a voltage equal to the breakover voltage of the DIAC, it switches the DIAC into conduction. The capacitor is then rapidly discharged into the gate, terminal of the SCR. After a short interval. the DIAC turns off and the cycle repeats. This arrangement requires a relatively low power to charge the capacitor from the DC source, but it supplies a large power for a short time for reliable SCR turn-on. The waveforms are shown in Figure 3 (b).
The trigger circuit in Figure 4 uses an optocoupler to obtain electrical isolation between the control circuitry and the load. Triggering via optocoupler also prevents false triggering from noise or transients. This triggering technique is especially popular in solid-state relays.
The most common method of controlling SCRs in AC applications is to derive the firing signal from the same AC source and to control its point of application to the SCR during the positive half cycle. A simple resistive trigger circuit is shown in Figure 5(a). During the positive half cycle, the SCR is in the forward blocking state. At some value of VS, the gate current is high enough to turn the SCR on. The exact moment of firing of the SCR is controlled by rheostat R2. Diode D ensures that only positive current is applied to the gate. In Figure 5(b), an RC circuit produces the gating signal. The voltage across C lags the supply voltage by an amount that depends on the value of (R1 + R2) and C. Increasing R2 increases the time it takes for the voltage VCto reach a level at which there is sufficient gate current to turn on the SCR.
A gate triggering circuit for an SCR provides a train of pulses with a frequency of 100 Hz and a pulse width of 2 ms. If the pulse has a peak power on W, find the average power dissipated by the gate?
Pulse period T = 1 / f = 1 / 100 = 10 ms
Duty cycle d = TON / T = 2 / 10 = 0.2
PG(avg) = 0.2 x 2 = 0.4 W
Triggering SCR in Series and in Parallel
SCRs connected in series or parallel should be triggered from the same source and at the same instant. This can be achieved by using a relatively high gate trigger voltage that tires the SCR faster resulting in a uniform tum on time A pulse transformer is used to ensure that all gates are triggered simultaneously. Figure 6 shows a gate trigger pulse transformer with properly insulated multiple secondary windings. The transformer also provides electrical isolation so that the trigger source is not loaded heavily, thus preventing other SCRs in the group from firing.
Figure 6: (a) Triggering SCRs in Series (b) Triggering SCRs in Parallel